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https://ir.vidyasagar.ac.in/jspui/handle/123456789/823Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Maiti, Saikat | |
| dc.contributor.author | Pal, Radha Raman | |
| dc.date.accessioned | 2016-12-22T17:20:42Z | - |
| dc.date.available | 2016-12-22T17:20:42Z | - |
| dc.date.issued | 2010 | |
| dc.identifier.issn | 0972-8791 (Print) | |
| dc.identifier.uri | http://inet.vidyasagar.ac.in:8080/jspui/handle/123456789/823 | - |
| dc.description | 247-253 | en_US |
| dc.description.abstract | In this paper, a new CMOS low-voltage balanced output second generation current conveyor (BOCCII) with rail-to-rail input stage is proposed. The rail-to-rail operation can be achieved by placing an n-channel and a p-channel differential input pair connected in parallel. PSpice simulations of the proposed balanced output current conveyor are given using 0.25μm CMOS technology and ±1.2V supply voltage to verify the results. The balanced output current conveyor exhibits a wide dynamic input range and a voltage transfer bandwidth of nearly 31.2MHz. | en_US |
| dc.language.iso | en_US | en_US |
| dc.publisher | Vidyasagar University , Midnapore , West-Bengal , India | en_US |
| dc.relation.ispartofseries | Journal of Physical Science;Vol 14 [2010] | |
| dc.subject | CMOS | en_US |
| dc.subject | balanced output current conveyor (BOCCII) | en_US |
| dc.subject | low-voltage | en_US |
| dc.subject | railto- rail | en_US |
| dc.title | Low-Voltage CMOS Balanced Output Current Conveyor with Rail-to-Rail Input Stage | en_US |
| dc.type | Article | en_US |
| Appears in Collections: | Journal of Physical Sciences Vol.14 [2010] | |
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